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Semiconductor Engineering

@SemiEngineering

Deep Insights For The Tech Industry #semiconductor #semiEDA #AI #embedded #verification #lowpower #test #DataAnalytics #automotive #chipdesign #ICmanufacturing

 Silicon Valley
semiengineering.com
Joined September 2013
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Memory In Physical AI youtu.be/68oMarzN2xI?si=iFHm… via @YouTube LPDDR6 becomes an essential ingredient as intelligence moves into autonomous and mobile edge systems. #LPDDR6 #HBM @Cadence #SOCAMM #cache #edge #semiconductor
Memory In Physical AI

Memory In Physical AI

Humanoid robots, autonomous vehicles, and drones all share one thin...

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Semiconductor Engineering@SemiEngineeringNov 6
Latest: HBM smuggling into China; Nvidia H200s held in Hong Kong; Micron pauses Taiwan fab; Samsung expands HBM base-die capacity; Bosch chip division; Marvell-Lumentum deal draws scrutiny; more acquisitions, market reports and earnings semiengineering.com/chip-ind… #semiconductor
Chip Industry Week In Review

Chip Industry Week In Review

HBM smuggling routes into China; Nvidia H200s held in Hong Kong; Micron pauses Taiwan fab work; Samsung expands HBM base-die capacity; Oracle-Tencent AI chip deal collapses; Bosch builds out semico...

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Compression can shrink AI models, but efficient edge deployment starts with matching the architecture to the workload and hardware limits. semiengineering.com/fitting-… #edgeAI #edge #physicalAI #AImodels
Fitting AI Models To Edge Applications

Fitting AI Models To Edge Applications

Compression can shrink AI models, but efficient edge deployment starts with matching the architecture to the workload and hardware limits.

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Semiconductor Engineering@SemiEngineeringNov 5
College Grads And AI Computer science majors may be in an awkward space; EE grads are fine for now. semiengineering.com/college-… #AgenticAI #engineering #workforce #EEeduction @AlphaDesignAI @Cadence @Synopsys @unisouthampton #llmdaai
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Latest: HBM smuggling into China; Nvidia H200s held in Hong Kong; Micron pauses Taiwan fab; Samsung expands HBM base-die capacity; Bosch chip division; Marvell-Lumentum deal draws scrutiny; more acquisitions, market reports and earnings semiengineering.com/chip-ind… #semiconductor
Chip Industry Week In Review

Chip Industry Week In Review

HBM smuggling routes into China; Nvidia H200s held in Hong Kong; Micron pauses Taiwan fab work; Samsung expands HBM base-die capacity; Oracle-Tencent AI chip deal collapses; Bosch builds out semico...

semiengineering.com
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College Grads And AI Computer science majors may be in an awkward space; EE grads are fine for now. semiengineering.com/college-… #AgenticAI #engineering #workforce #EEeduction @AlphaDesignAI @Cadence @Synopsys @unisouthampton #llmdaai
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Semiconductor Engineering@SemiEngineeringOct 28
Advanced packaging requires models to cross company boundaries without exposing proprietary processes, but hiding too much can make the prediction break down. semiengineering.com/how-much… #semiconductor #advancedpackaging
How Much Can Semiconductor Models Hide?

How Much Can Semiconductor Models Hide?

Advanced packaging requires models to cross company boundaries without exposing proprietary processes, but hiding too much can make the prediction break down.

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Shared resources, a mix of tools running at different speeds, and multiple dies are adding new challenges for design teams. youtu.be/lkPX3lINOX4?si=YKPY… #chiplets #CXK #PCIe #simulation #semiconductor
Accelerating Plug-And-Play Prototyping In Chiplet-Based Designs

Accelerating Plug-And-Play Prototyping In Chiplet-Based Designs

Verifying chips is becoming much more difficult in multi-die assemb...

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Semiconductor Engineering@SemiEngineeringNov 2
Rise in complexity is pushing engineers to validate hardware, software, and physical constraints earlier in the design flow, but fragmented workflows make that difficult. semiengineering.com/shift-le… #semiEDA @SilvacoGroup @axiomise @Synopsys #HiveWare #semiconductor #verification
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Semiconductor Engineering@SemiEngineeringOct 26
Advanced packaging, photonics, test, and AI are increasingly intertwined; very different conversations ahead. Big shifts seen at SEMICON West semiengineering.com/chip-sca… #semiconductor
Chip Scaling Moves Beyond The Transistor

Chip Scaling Moves Beyond The Transistor

SEMICON West 2026: Advanced packaging, photonics, test, and AI are increasingly intertwined; very different conversations ahead.

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Technology is only useful if it improves an existing methodology. Property generation is still refining that goal, but in the long term it could be very useful. semiengineering.com/auto-gen… #semiEDA #verification #RAG #AI
Auto-Generation Of Properties: Methodology Insertion

Auto-Generation Of Properties: Methodology Insertion

Technology is only useful if it improves an existing methodology. Property generation is still refining that goal, but in the long term it could be very useful.

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Semiconductor Engineering@SemiEngineeringOct 31
New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-ind… #semiconductor #DRAM #CFET #HBM #EUVlithography #photonics #CIM
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Rise in complexity is pushing engineers to validate hardware, software, and physical constraints earlier in the design flow, but fragmented workflows make that difficult. semiengineering.com/shift-le… #semiEDA @SilvacoGroup @axiomise @Synopsys #HiveWare #semiconductor #verification
Image from Semiconductor Engineering (@SemiEngineering)
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Semiconductor Engineering retweeted
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Semiconductor Engineering@SemiEngineeringOct 30
Latest: HBM shortages threaten AI expansion; TSMC weighs price hikes; adv. packaging ramps; domain-specialized AI models; Infineon & UMC boost fab investments; Intel’s quantum move; Lam & imec advance 3D integration; Google expands TPUs; CPU benchmarking semiengineering.com/chip-ind…
Chip Industry Week In Review

Chip Industry Week In Review

Marvell to buy Lumentum; HBM shortages threaten AI expansion; TSMC weighs price hikes; advanced packaging ramps; domain-specialized AI models; Infineon and UMC boost fab investments; Intel's quantum...

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New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-ind… #semiconductor #DRAM #CFET #HBM #EUVlithography #photonics #CIM
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Semiconductor Engineering retweeted
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Semiconductor Engineering@SemiEngineeringOct 27
Advanced packaging growth and capacity constraints are pushing more onto OSATs. semiengineering.com/foundrie… #semiconductor #OSAT #foundries
Foundries And OSATs Increasingly Overlap

Foundries And OSATs Increasingly Overlap

Advanced packaging growth and capacity constraints are pushing more onto OSATs.

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Latest: HBM shortages threaten AI expansion; TSMC weighs price hikes; adv. packaging ramps; domain-specialized AI models; Infineon & UMC boost fab investments; Intel’s quantum move; Lam & imec advance 3D integration; Google expands TPUs; CPU benchmarking semiengineering.com/chip-ind…
Chip Industry Week In Review

Chip Industry Week In Review

Marvell to buy Lumentum; HBM shortages threaten AI expansion; TSMC weighs price hikes; advanced packaging ramps; domain-specialized AI models; Infineon and UMC boost fab investments; Intel's quantum...

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Rethinking Shift Left In Chip Design semiengineering.com/rethinki… Is it better to do everything earlier in the flow, or should design be more flexible and iterative? #semiEDA #chipdesign @SilvacoGroup @axiomise #Hiveware @Synopsys #shiftleft #semiconductor
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Advanced packaging requires models to cross company boundaries without exposing proprietary processes, but hiding too much can make the prediction break down. semiengineering.com/how-much… #semiconductor #advancedpackaging
How Much Can Semiconductor Models Hide?

How Much Can Semiconductor Models Hide?

Advanced packaging requires models to cross company boundaries without exposing proprietary processes, but hiding too much can make the prediction break down.

semiengineering.com
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Semiconductor Engineering retweeted
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Semiconductor Engineering@SemiEngineeringOct 22
Special Report: Engineers are discovering many things they thought were process assumptions were actually wafer assumptions semiengineering.com/what-bre… #semiconductor #PLP #panellevelpackaging #advancedpackaging
What Breaks When Packaging Moves From Wafer To Panel?

What Breaks When Packaging Moves From Wafer To Panel?

Engineers are discovering many things they thought were process assumptions were actually wafer assumptions.

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