CPSOSAWARE EU funded project retweeted
Great to share film reel with you, @Smart_4All! 🫸
CPSOSAWARE EU funded project retweeted
📣 Happy to share a video on NextGenCPSoS cluster of 7 project partners under @ICONSinnovation's coordination
🔴👉 tinyurl.com/s4a26623
🤝 Joining forces for the future of #CPS with:
@ADMORPH1
TEACHING_H2020
@DIH4CPS
@Adeptness_EU
@hipeac
@CPSoSAWARE
CPSOSAWARE EU funded project retweeted
📆 Yesterday, #EsdaLab researchers, Dr. Evi Faliagka & MSc. Eng.
@Alexander
Sp attended the 3rd DIH2 Network Convention 📷 Dr. Faliagka presented ESDA LAB's achievements at a brokerage pitch session
@Smart_4All , @ProjectXandar , @MetacitiesH , @CPSoSAWARE , #AUTOMAINT
CPSOSAWARE EU funded project retweeted
[Thread]: We've been watching the news from Turkey and Syria in horror following last week's earthquake. Several HiPEAC members and their colleagues are based in Turkey, including @didemunat.
CPSOSAWARE EU funded project retweeted
It’s been three years of harmonious and constructive collaboration. We hope to cooperate again soon!
🎯We are pleased to announce the successful completion of the CPSoSaware research project, following a fruitful and positive outcome of the Final Review meeting.
Learn more at cpsosaware.eu/2023/02/09/fin…
CPSOSAWARE EU funded project retweeted
Congratulations, @CPSoSAWARE! 👏👏
🎯We are pleased to announce the successful completion of the CPSoSaware research project, following a fruitful and positive outcome of the Final Review meeting.
Learn more at cpsosaware.eu/2023/02/09/fin…
CPSOSAWARE EU funded project retweeted
HW accelerators require vendor-specific steps to use. A generic memory-mapped interface helps integrating them to a diverse OpenCL platform. Our interfacing work is now published in doi.org/10.1016/j.micpro.202… and the code available in the @portablecl repo! @openclapi @CPSoSAWARE
CPSOSAWARE EU funded project retweeted
🟠PROJECT HUB 🆕
A snapshot of the 50+ #HorizonEurope & #H2020 projects who are working on Standards who applied for the @HSboosterEU that will get the opportunity to receive a practical support in the achievement of their #Standardisation goals.
hsbooster.eu/project-hub
CPSOSAWARE EU funded project retweeted
⏪ On 6/12/22, #SMART4ALL participated in the introductory call for Module B of the @HorizonBooster services, as a member of the NextGenCPSs cluster
🙌 Happy that we will collaborate with @ICONSinnovation, @CPSoSAWARE, @ADMORPH1, TEACHING H2020, @DIH4CPS, @hipeac @Adeptness_EU
CPSOSAWARE EU funded project retweeted
Check a demo made with some of our final technical outcomes from the @CPSoSAWARE EU project: Nano-PoCL, PoCL-R and AlmaIF v2. Offloading OpenVX from a nanodrone to an FPGA using OpenCL as the offload API. Exciting stuff! youtu.be/GtNsznRk5jE @openclapi @portablecl
CPSOSAWARE EU funded project retweeted
CPSoSaware trials for Automotive pillar news.europawire.eu/cpsosawar… #connectedvehucle #autonomous #Horizon2020 @CPSoSAWARE
CPSOSAWARE EU funded project retweeted
CPSoSaware on-site demonstrations for #Manufacturing pillar news.europawire.eu/cpsosawar… #robotics #automation #horizon2020 @CPSoSAWARE
CPSOSAWARE EU funded project retweeted
Replying to @EsdaLaboratory @CPSoSAWARE
We are looking forward to welcome everyone at #ew23 in Nuremberg. See you soon @EsdaLaboratory ! 😊
CPSOSAWARE EU funded project retweeted
Ready for our last physical meeting in @CPSoSAWARE where the #automotive demo will take place in @panasonic premises. One of the demonstrated solutions include our #Android #DriverMonitoring solution. @catalink_eu
CPSOSAWARE EU funded project retweeted
A presentation about our ongoing work on PoCL-R: Distributed OpenCL Runtime for Low Latency Offloading available: youtu.be/Usj0CPC8zEs @portablecl @openclapi @FitOptiVis @CPSoSAWARE
CPSOSAWARE EU funded project retweeted
PoCL 3.1 is now out! It has LLVM 15 support, much improved SPIR-V input for CPUs and CUDA, better custom/HW accelerator device interfacing, first version of command buffer support, and other goodies! portablecl.org/pocl-3.1.html @openclapi @CPSoSAWARE
CPSOSAWARE EU funded project retweeted
OpenASIP 2.0 is out! It has the first #RISCV customization features, improved FU generation, LLVM 15, IP wrapping, among other new features! @sochubfi @CPSoSAWARE @openhwgroup openasip.org/release_2_0.htm…
CPSOSAWARE EU funded project retweeted
PoCL 3.1-RC1 has been tagged! Please help testing the next release: github.com/pocl/pocl/release… @openclapi #opencl @CPSoSAWARE
CPSOSAWARE EU funded project retweeted
A more advanced version of an OpenCL driver for specialized hardware accelerators has been pushed to the master branch of PoCL portablecl.org/almaif.html @openclapi @CPSoSAWARE
CPSOSAWARE EU funded project retweeted
🔮 In 2030, what will be the TOP 10 #cybersecurity threats?
#ENISA undertook an 8-month foresight exercise to identify and rank the top emerging threats
Find out more in our infographic ➡️europa.eu/!nMPNVW































