Charles retweeted
Someone get at this kid. He needs some real fucking money. Hire him or something ffs.
brb
We asked GPT-6 Astra to edit Qwen3.5-0.8B weights to improve math.
It directly changed only 0.016% of weights, fixing 0.8B's reasoning loops & improving math up to 6x and even instruction following 3x, without gradients or training.
We call this Weight-Space Programming: frontier LLMs can now natively read/write neural network weights! 🧵
Blog: rikiyat.github.io/blog/weigh…
Readers added context they thought people might want to know
LLM was given weights explicitly as text in prompt and used code/forward passes (per authors' logs) to ablate Qwen looping direction, a known thinking-mode issue per model card. Primarily fixed repetition in that mode, not general 'natively' improving weights/math.
rikiyat.github.io/blog/weight-sp…
github.com/RikiyaT/lm_und…
huggingface.co/Qwen/Qwen3.5-0…
huggingface.co/RikiyaT/Qwen3.…
Looking into streaming options for my game. Maybe portions of code will be streamed during play so itll make it online only. Lots to think about here.
Whoever funded the marketing campaign for this did a good job. Absolute mid game but the marketing push and all the influencers. I need to learn how to do this. How much does it cost?
Such a solid move.
Memory bandwidth has been the limiting factor for LLM inference for a while now, and anyone building out inference capacity is paying for it in power and in cost per token. @Qualcomm has been talking about High Bandwidth Compute as its answer to that problem, and today it showed first-generation HBC silicon working in its San Diego lab, running the full memory read-write path and near-memory compute at production-representative sizes.
The numbers Qualcomm is sharing are big, with 18x the effective bandwidth of LPDDR5X and more than 5x the bandwidth per watt of HBM4. Those are Qualcomm estimates, normalized from ATE testing and compared against published competitor specs, so I'll want to see how they translate once HBC is sitting inside a full accelerator.
That first accelerator will likely be Dragonfly AI250, which Qualcomm expects to sample in the first half of 2027 as part of its Dragonfly Rack platform. A data center product has already taped out and early bring-up of the bonded DRAM stack is apparently yielding well, which tells me this has moved past the research phase. Qualcomm has more than a decade of experience bonding DRAM onto logic from its mobile business, but HBC is the first time I've seen that work pointed directly at data center inference economics.
If HBC delivers anything close to those efficiency numbers in a shipping system, the market impact could be significant. HBM supply has been one of the tightest constraints on AI infrastructure buildouts, and it is a big part of what makes today's accelerators (and basically everything else!) so expensive. An inference platform that gets its bandwidth from a different memory approach would give hyperscalers and cloud providers another lever on cost and supply, and it would put real pressure on NVIDIA and AMD in the inference tier, where tokens per dollar per watt matter more than peak training performance.
Silicon is only part of what these customers are buying, though. Hyperscalers commit to a platform for years, and they need confidence in a multi-generation roadmap, a mature software stack, supply they can count on and support when things break at scale. Qualcomm walked away from its Centriq server CPU effort in 2018, and data center buyers have long memories. The HBC results are a strong technical step, and the next couple of years will determine whether Qualcomm can prove it is the kind of reliable, long-term partner these companies need.
qualcomm.com/news/onq/2026/1…
Charles retweeted
Replying to @0xConda
Vulnerability finding is solved, xd. Kudos to all the great hackers. Roses for the funeral.
I found something very nintendo. Really nintendo. Too bad can't say right now. Its pretty nintendo switch 2.























