Is it Time for NICs to get Smarter? "SMART-NICs will play a key role in compute platforms for both Data Center and Edge." blog.dellemc.com/en-us/smart…
Some product features are like black holes. They're able to consume any number of person-months you throw at them.
Viktor Puš retweeted
142 developers wrote #DPDK 19.05:
mails.dpdk.org/archives/anno…
Go check it and discover the new lock-free algorithms, the new FPGA drivers, the use of Linux AF_XDP, and a lot more!
doc.dpdk.org/guides/rel_note…
Brilliant keynote by John Hennessy today at P4 workshop. End of Moore's law and more importantly Dennard's scaling clearly lead to rise of domain specific architectures and languages. Such as ... #P4!
Viktor Puš retweeted
Barefoot is delighted to join @XilinxInc, @ATT, @Cisco, @Google, & @NetcopeTech as a Sponsor of #P4Workshop19 taking place on May 1st at Stanford University. Hope to see you there! #P4Programmabilitiy
P4 Workshop agenda announced! 1 notable keynote from John Hennessy, 10 interesting talks from industry experts and academics, 13 exciting demos = Lots of reasons to attend #P4Workshop19! Check out the agenda and reserve your seat! bit.ly/2UzVyZ1
Viktor Puš retweeted
More and more open infrastructure will require an open #programming language to enable networking professionals to leverage #FPGA technologies. P4 is that open language and #Netcope has enabled P4 for FPGAs. Come ask us how.
Viktor Puš retweeted
Acclaimed Computer Scientist, Stanford Titan and “Godfather of Silicon Valley” John Hennessy is #P4Workshop19 Keynote speaker. Join us as he shares his thoughts on the end of Moore's Law. Register today! bit.ly/2VPQhOs
This is a network engineer's Hello World program. Network Interface Card in P4.
A NEW WHITEPAPER JUST RELEASED. Building a #NIC with Netcope P4.
"Automation of #FPGA design for computer networks. That's what defines #Netcope P4." Denis Matoušek, Product Manager
For more: bit.ly/2TuVI3p
The 2019 P4 Workshop program committee is delighted to inform you that your demo proposal #7 has been accepted to appear at the workshop. Title: Optimizing Memory Resource Allocation of P4 Match Action
Tables. By @PavelBenacek @CESNET_cz @liberouter and @NetcopeTech
Intel announces FPGA PAC N3000. "IP traffic is expected to increase threefold over the next five years worldwide, and today’s hardware is not ready to handle that kind of load increase." eejournal.com/article/flippi…
Opinion: Bezel-less is not the way forward. One of the reasons I'm happy with my SE. gsmarena.com/no_bezelless_is…
Viktor Puš retweeted
We are happy to announce a P4 Hackathon, in conjunction with NSDI'19. Join us!
p4.org/events/2019-03-01-nsd…
@p4lang @usenix #nsdi19

















